Product Details
Fig. 1. Functional Block Diagram
The ASNT8762 is a quarter-rate integrated clock recovery (CR) circuit. The IC shown in Fig. 1 covers a wide range of input data rates (fbit) by utilizing its six on-chip VCOs (voltage-controlled oscillators). To reduce the physical number of control inputs to the chip, a shift register with a 3-wire input interface (SPI) has been included on chip. The SPI block provides all the digital controls for the chip. It also provides digital controls for digital-to-analog converters (DACs) that handle internal analog DC voltage adjustments. Selection of the desired working data rate of the CR is accomplished through the digital control vcosel (see Table 2 within the datasheet). An external low-speed system clock c128p/c128n running at 1/32 the frequency of the active VCO must be applied to the low-speed clock input buffer (CLK IB). The main function of the chip is to recover from an NRZ or PAM4 input data signal dp/dn with a bit rate of fbit accepted by CML buffer (Data IB) a quarter-rate clock c4p/c4n that is delivered to the output by the CML clock output buffer (COB). For example, a 28GHz clock signal will be generated from a 112Gb/s input data signal. The internal DLL feedback circuit automatically adjusts phases of internal clock signals that are required in the phase detector for correct clock recovery. If needed, the automatic feedback can be disabled by the digital bit fb_off of SPI. In the manual mode (fb_off=“1”), the digital bytes of SPI dllcrl and delcrl can be
used to set delays between phases of the internal clock signals manually.
All CML I/Os provide on chip 50Ohms termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination (see also POWER SUPPLY CONFIGURATION). A loss of lock CMOS alarm signal lolp is generated by the CR to indicate its locking state. An off chip passive filter is required by the CR, and should be connected to pin flt (see Core section). The clock recovery circuit is characterized for operation from 0°C to 125°C of junction temperature. The package temperature resistance is 15°C /W.