Product Details

Fig. 1 Functional Block Diagram
The temperature stable ASNT6793-DIE 1-to-3 analog signal splitter intended for use in high-speed interleaved ADCs or similar systems. Its extra-flat frequency response is ideal for PAM3 and PAM4 signals. The IC shown in Fig. 2 can receive a broad-band analog signal at its differential input dp/dn and effectively distribute it to three separate phase matched differential outputs q1p/q1n, q2p/q2n, and q3p/q3n with a nominal gain of 0dB. Low-speed analog current controls efcrl and bufcrl are available for power consumption and bandwidth adjustments. Each control range is separated into two zones: Zone 1 and Zone 2. While each zone has a full adjustment range for the corresponding current control, switching between zones allows for the binary selection between default and maximum values for peaking and gain. A relatively flat frequency response with variation of no more than ±0.5dB within DC-to-30GHz can be achieved with these two control voltages.
The part’s I/O’s support the CML logic interface with on chip 50Ohm termination to vcc and may be used differentially, AC/DC coupled, single-ended, or in any combination (also see POWER SUPPLY CONFIGURATION). In the DC-coupling mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS. In the AC-coupling mode, the input termination provides the required common mode voltage automatically. Optimal performance is achieved with differential DC signaling mode.