Analog and digital applications require the use of frequency division to tailor the signal according to circuit requirements. Several approaches can be used to create a frequency divider circuit. Let’s take a look at some of these approaches.
D-type Frequency Divider Circuit
As the name suggests, this type of circuit makes use of d-type flip-flops. For those of you who’re not aware of what a D-type flip-flop is, here’s the gist of it.
A d-type flip-flop is an edge-triggered flip-flop that changes its output response only during the rising edge of the clock. The edge-triggered feature of d-type flip-flops allows easy division of the incoming clock by a factor of 2.
The output from Q’ is fed back as input, creating a feedback loop. The incoming pulse serves as a clock for the divider circuit, causing data to appear as output.
Consider this example for understanding the working of d-type clock dividers. Consider the first input of the clock to be ‘1’. This causes the input to appear at Q. If Q=1, then Q’=0. This Q’ is fed into the input again, however, by the time that time, the clock cycle falls back to 0, storing the output ‘1’. The output will change from 1 to 0 during the next rising edge of the clock.
During the two clock cycles, the output changes only once—dividing the output frequency by 2.
555 Frequency Divider Circuit
Named so due to the presence of three internally connected 5kW resistors; the IC is used as a timer circuit to generate waveforms with varying duty cycles between 50% and 100%.
The working of the circuit starts with the signal generation, followed by its frequency division.
The 555 tier generates the input frequency, regulated by a potentiometer. The generated frequency further goes into 4017 IC. Depending on your frequency division range, you can connect the reset pin OF 555 IC to Q2, Q4 or other output terminals on 4017 IC.
If you’ve connected your reset pin to Q2, your 555 timer will be reset on every second pulse, dividing your clock signal by 2.
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