ASNT8146-KMC

PRBS9/PRBS10 Generator (x^9+x^4+1 and x^10+x^7+1) Polynomials with Output Amplitude Control

Full-length (2^9-1) or (2^10-1) pseudo-random binary sequence (PRBS) generator
Selectable power of the Polynomial
DC to 32Gbps output data rate
External output amplitude control
Asynchronous reset signal for elimination of the “all zeros” initial state
Fully differential CML input interface
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Frequency (min): DC
Frequency (max): 32 Gbps
Power: 1220 mW
Package: 24-pin CQFP
Price: Request

Product Details

Fig.1 Functional Block Diagram

The ASNT8146-KMC SiGe IC shown in Fig. 1 provides a selectable full 511-bit or 1023-bit long pseudo-random binary sequence (PRBS) signal according to either a (x9 + x4 + 1), or a (x10 + x7 + 1) polynomial respectively, where xD represents a delay of D clock cycles. This is implemented as a linear feedback shift register (LSFR) in which the outputs of either the ninth and fourth, or tenth and seventh flip-flops are combined together by an XOR function, and provided as an input to the first flip-flop of the register. The PRBS register can be preset to All-“1” state with an asynchronous external active-low preset signal rstnp/rstnn. The generated PRBS signals are delivered to a differential output port qp/qn through a CML output buffer (OB). The Output Buffer provides the possibility for an output amplitude adjustment through an external low-speed differential analog port ampp/ampn.

All I/O stages are back terminated to vcc with on-chip 50Ohms resistors and may be used in either DC or AC coupling modes (see also POWER SUPPLY CONFIGURATION). In the first mode, the input signal’s common mode voltage should comply with the specifications shown in ELECTRICAL CHARACTERISTICS. In the second mode, the input termination provides the required common mode voltage automatically. The differential DC signaling mode is recommended for optimal performance.