Clock Splitter: An Active High Frequency Clock Splitter
An effective method to disburse a needed synchronizing clock signal throughout a system is by employing an active clock splitter. Compared to a passive solution, an active device delivers gain amplification, which is useful when signal restoration is required. As opposed to larger mechanical designs, active solutions are compact and can be utilizes as further drivers around the system.
ADSANTEC’s ASNT5121B-KMC is an 1 to 3 active clock fan out buffer that functions with input clock frequencies up to 35GHz. The buffer generates 3 copies of the input signal with minimal latency. The three output signals are phase matched by using internal circuitry matching and symmetry. All four I/Os feature CML and have included 50Ω resistors on chip to Vcc (the most positive power supply). The user friendly I/Os can be configured single-ended (AC coupling is recommended) or differentially. The output buffers are specifically designed to handle only clock signals and thus deliver fast rise and fall times of 8ps at amplitudes of 400mV pk-pk single-ended (800mV pk-kp differential).
Application areas include test and measurement (T&M) and R&D. As a standalone part, it is very useful in a high frequency lab setting to generate replicas of a test clock signal. As mentioned earlier, the clock splitter is a very effective way to dispense a system’s clock signal. For example, if a system is featuring several high speed DFFs working in parallel whose samples need to be in phase, in phase clock signals are required, which can be easily generated by the ASNT5121B-KMC from one input clock.
The user friendly compact clock splitter comes in an in expensive easy to solder QFN packaging solution.